The present invention relates to a high frequency semiconductor device, and more particularly to packaging which can provide the semiconductor device with an excellent high frequency characteristic.
Referring to FIGS. 6A and 6B, the previous method for packaging a high frequency transistor (3GHz or higher), particularly a GaAs-FET (field effect transistor) will be explained. As shown in FIGS. 6A and 6B, a GaAs-FET chip 100 is sealed within a package consisting of a base 101 and a cap 107 both of which are made of alumina ceramic. In FIGS. 6A and 6B, 102 are bonding wires, and 103A, 103B and 103C are Au-plated layers with which a drain electrode lead 104, a source electrode lead 105 and a gate electrode lead 106 are connected, respectively.
The schematic process for packaging such a GaAs-FET is shown in FIG. 7 of the flow chart. In Step 1, the back surface of a GaAs wafer, which has been ground and shaped to a prescribed thickness, is metallized with e.g. Au on which solder for dice bonding is to be applied. In Step 2, the wafer is scribed and broken into a number of chips. In Step 3, each of the chips is dice-bonded on the Au-plated layer 103B using e.g. an Au/Sn solder. In Step 4, wire-bonding is made for each of the chips by using bonding wires 102. In this step, it is important to make the source inductance as small as possible to improve the high frequency characteristic, particularly, the noise factor (F) and the gain (Ga). For this purpose, the length of bonding wires 102s is made as short as possible, and the number of the wire bondings is increased (4 in FIG. 6A). Finally, in Step 4, the cap 107 is bonded to the base 101.
Meanwhile, reduce fabricating costs for microwave semiconductor packages have been eagerly demanded; this demand is so great that it cannot be satisfied only by reducing the cost for semiconductor chips themselves. As a result, cost reductions with respect to assembling the semiconductor chip or packaging it have been eagerly demanded. Some microwave packages occupy in their assembling and mounting cost almost half the entire cost of the semiconductor device. However, the reduction in cost is limited as long as the conventional ceramic package is used. Further, the high performance of the semiconductor devices has been further required; this requirement also cannot be satisfied merely by improving the chips themselves, and so must be satisfied in the viewpoint of packaging. For example, in order to shorten the length of the above-described source wire, the "flip-chip bonding" technique has been proposed for a power FET; in the flip-chip bonding technique, bumps formed on the electrodes of a ceramic package are bonded with the pads on a chip which are provided in opposition to the bumps. However, this technique, which improves the performance but uses the ceramic package, is still expensive since it requires a step of forming bumps on the expensive ceramic body and cannot satisfy the requirement of low cost.